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CHIP DESIGN SYSTEMS INC

HOCKESSIN, DE, 19707

Minority Owned

Prime contracting experience

5 records from government sources. Past participation is not evidence of current teaming interest.

RoleAgencyDescriptionVehicleObligatedAction datePeriod
Prime
Department of Defense
Missile Defense Agency
SBIR/STTR PHASE II R&D—$1,876,496Jul 2, 2025Feb 8, 2023 – Jul 7, 2026
Prime
Department of Defense
Department of the Army
SBIR PHASE II-THIS EFFORT IS TO BUILD A PROTOTYPE DUAL COLOR IR CLUTTER GENERATOR.—$1,099,999Aug 15, 2023Sep 21, 2021 – Sep 22, 2024
Prime
Department of Defense
Department of the Air Force
NEXT GENERATION INFRARED SCENE PROJECTOR FOR TESTING MWIR SYSTEMS—$737,394Oct 14, 2022Sep 4, 2019 – Dec 30, 2022
Prime
Department of Defense
Department of the Air Force
SCENE PROJECTOR ELECTRONICS—$1,315,486Apr 12, 2022Apr 12, 2022 – Jul 15, 2024
Prime
Department of Defense
Defense Contract Management Agency
IGF::OT::IGF HIGH DEFINITION INFRARED LIGHT EMITTING DIODE (HD-ILED) ARRAY—$3,328,866Mar 29, 2022Apr 28, 2015 – Sep 24, 2018

Contract vehicles are shown only when present in the source record. Linked award numbers and vehicles open the authoritative record on USAspending.gov.

Subcontracting experience

2 records from government sources. Past participation is not evidence of current teaming interest.

RoleAgencyDescriptionVehicleObligatedAction datePeriod
Subcontractor
Department of Defense
THE GOAL OF PROPOSED WORK IS TO FABRICATE, CHARACTERIZE AND DELIVER TO TRMC CUSTOMER AN IRSP SYSTEM POWERED BY A 512X512 TWO-COLOR MWIR LED HYBRID ARRAY WITH 48-MICRON PIXEL PITCH. THE ARRAY WILL BE PACKAGED IN CUSTOM GIFFORD-MCMAHON CRYOSTAT WITH 200-WATT HEAT REMOVAL CAPABILITY. THE SUPPORT ELECTRONICS WILL CONSIST OF QUAD NESSIE-CLASS CSE INTERFACED WITH A COMPUTER THAT PERFORMS NUC AND DISPLAYS STILL AND MOVING IMAGES ON THE ARRAY. THE DELIVERED SYSTEM WILL BE A COMPLETE AND SELF-CONTAINED IRSP. CDS WILL PROVIDE TRAINING AND CUSTOMIZATION TO ADAPT THE IRSP SYSTEM AND FIRMWARE TO SPECIFIC CUSTOMER TEST REQUIREMENTS.
S02014-01
Parent award context
Parent award agency: Department of Defense · Department of the Army
Parent award NAICS: 541713
Parent award performance state: IA
Parent award description: AWARD OF SUPER LATTICE LIGHT EMITTING DIODES (SLEDS)ARRAY MULTI-SPECTRAL (SAMS) CONTRACT OFF OF BROAD AGENCY ANNOUNCEMENT.
View parent award on USAspending
—$143,863Mar 14, 2022— – —
Subcontractor
Department of Defense
CDS TASKS:TASK 1: PERFORM SIMULATIONS OF ENHANCED SLEDS DRIVER CIRCUITS (UDEL/CDS)TASK 2: PARTICIPATE IN BIWEEKLY MEETINGS WITH TEAM. (UIOWA, UDEL/CDS, ATEC)A.UIOWA GIVE UPDATES ON DEVICE ENHANCEMENT TO UDEL/CDS, AND ATEC.B.GET SUGGESTIONS ON ENHANCED SLDE DEVICE CONFIGURATIONS FROM UDEL/CDS THAT CAN BE EFFICIENTLY DRIVEN WITH RIIC.C. ATEC WILL PROVIDE FEEDBACK ON DESIGN OPTIONS USING THEIR THERMAL MODELS TO THE PROJECT TEAM. THE KEY DESIGN FACTORS AFFECTING THERMAL BEHAVIOR ARE THE NUMBER, SIZE AND LOCATION OF THE BOND PADS CONNECTING THE ACTIVE MESAS TO THE RIIC AND THE HYBRIDIZATION LAYERS BETWEEN THE RIIC AND THE COLD FINGER/LN2 RESERVOIR. TASK 3: BUILD, INTEGRATE, OPERATE, TEST AND REPORT ON PROJECTOR COMPONENT BRASS BOARD AS RISK MITIGATION FOR PHASE 3. A.CUSTOM PACKAGE. BUILD CUSTOM COTS PACKAGE TO ACHIEVE 200 WATTS COOLING POWER AND 500 HZ FRAME RATE FOR A 2KX2K ARRAY, OR 2 KHZ FRAME RATE FOR 1KX1K ARRAY.B.MULTIPLE CSES. USE QUAD-CSE CONFIGURATION TO ACHIEVE 500 HZ FRAME RATE AT 2KX2K OR 2 KHZ AT 1KX1K AND TO MATCH TO CUSTOM PACKAGE OPTION.C.GIGABIT INTERFACE. USE GIGABIT SERIAL LINKS FOR OPTIMAL PROJECTOR SYNCHRONIZATION, JITTER AND RATE TOLERANCES. THIS TASK INCLUDES CUSTOM HARDWARE AND FIRMWARE DESIGN WORK. D.ANALOG ELECTRONICS. ANALOG ELECTRONICS WILL BE DESIGNED FOR HIGH BIT-ACCURACY AND SPEED OF ELECTRICAL ANALOG SIGNALS DELIVERED TO THE IRLED ARRAY AND BE COMPATIBLE WITH THE CUSTOM PACKAGE COTS (TASK 6A).E.SLEDS ARRAY FABRICATION. FABRICATE A 2KX2K SLEDS WAFER. IMPROVE QUALITY CONTROL OF SLED ARRAY PRODUCTION. THIS SUBTASK WILL BE PERFORMED BY FIREFLY PHOTONICS. F.HYBRIDIZATION. HYBRIDIZE 2KX2K IRLED AND RIIC. THIS TASK WILL BE PERFORMED BY TELEDYNE IMAGING AND SENSORS (TIS).G.PROJECTOR INTEGRATION. H.NUC DEVELOPMENT. I.RELIABILITY EVALUATION. PERFORM DAILY TEMPERATURE CYCLING AND OPERABILITY EVALUATION OF IRLED PROJECTORS AND HYBRIDS.J.DELIVERY OF REPORT ON PROJECTOR COMPONENT RISK REDUCTION.PHASE 2ADDED TASK €“1.STUDY HOW THE NEW IRLED DEVICE CONFIGURATIONS REDUCE THERMAL DEGRADATION OF RADIANCEIN PHASE 3, CDS WILL FIRST DESIGN, FABRICATE A TEST CHIP WITH POTENTIAL EIRE PIXEL CIRCUIT DESIGNS. ONCE THESE DESIGNS HAVE BEEN PROVEN TO WORK, CDS WILL DESIGN AND FABRICATE EIRE RIIC WAFERS AT ONSEMI FOUNDRY. THE RIIC DESIGN WILL BE 1KX1K WITH 24-MICRON PIXEL PITCH AND WILL BE FULLY COMPATIBLE WITH NLSEDS PROJECTOR INTERFACE. AT THE END OF THE POP, CDS WILL DELIVER THE WAFERS TO UDEL FOR WAFER TESTING. AFTER COMPLETING WAFER TESTING AT UDEL, THE RIIC WAFERS WILL BE SENT TO TELEDYNE FOR ASSEMBLY INTO EIRE HYBRIDS.PHASE 3 TASKS1. DESIGN OF EIRE TEST CHIP2. VERIFICATION OF EIRE TEST CHIP3. FABRICATION OF EIRE TEST CHIP4. ASSIST UDEL WITH CHARACTERIZATION OF EIRE TEST CHIP5. REVIEW OF TEST RESULTS OF EIRE TEST CHIP6. DESIGN OF EIRE RIIC7. VERIFICATION OF EIRE RIIC8. TILING OF EIRE RIIC ON WAFER9. FABRICATION OF EIRE RIIC WAFERS10. ASSIST UDEL WITH CHARACTERIZATION OF EIRE RIIC WAFERS11. REVIEW RESULTS OF WAFER TESTING12. SEND EIRE RIIC WAFERS TO TELEDYNE FOR HYBRIDIZATION
1001752303
Parent award context
Parent award agency: Department of Defense · Department of the Navy
Parent award NAICS: 541712
Parent award performance state: IA
Parent award description: IGF::OT::IGF CLIN0001 BASE AWARD (EIRE) PHASE 1 BROAD AGENCY ANNOUNCEMENT AWARD UNDER ELECTRONIC WARFARE TEST (EWT) R&D EFFORT TO DEVELOP AN EFFICIENT INFRARED EMITTERS (EIRE)
View parent award on USAspending
—-$19,632Nov 15, 2021— – —

Contract vehicles are shown only when present in the source record. Linked award numbers and vehicles open the authoritative record on USAspending.gov.

Agencies supported

  • Department of DefenseGov-sourced

Government-sourced data comes from SAM.gov, SBA and USAspending.gov and is attributed to its source. Items marked company-reported were provided by the company and are verified by FedSub only where labeled. FedSub is a private company and is not affiliated with SBA, GSA/SAM.gov, or any government agency.

CHIP DESIGN SYSTEMS INC – Hockessin, DE | UEI PN31T8TQRHX3 | FedSub